Terms often used when analyzing semiconductor companies across memory, foundry, equipment and materials. The industry's earnings are heavily driven by the industry cycle and the technology race. 31 terms in total.
Memory chips store data (DRAM, NAND), while logic chips handle computing and control (CPUs, GPUs, communications chips and more). Memory prices swing widely, making earnings volatile, while logic chips cover many product types and tend to be relatively stable.
Memory that holds data temporarily while power is on, serving as the working space of PCs, smartphones and servers. When DRAM prices rise or fall, memory makers' profits change sharply, so their stocks react strongly to price trends.
Storage memory that keeps data even when power is off, used in SSDs, USB drives and smartphone storage. Competition over the number of stacked layers is intense, and like DRAM, profits swing widely with the price cycle.
e.g. The '256GB storage' on a smartphone is NAND flash.
The next-generation DRAM standard after DDR4, with faster speeds and better power efficiency. New standards usually sell at higher prices, so a rising share of DDR5 lifts memory makers' average selling prices.
Memory made by stacking multiple DRAM chips vertically so a large amount of data can move at once. It is attached to AI accelerators (GPUs) and is far more expensive than regular DRAM, so HBM supply and market share are key drivers of memory makers' earnings and stock prices.
e.g. Several HBM stacks are packaged alongside an AI GPU.
High-capacity, high-endurance SSDs used in data center servers. They carry higher prices and margins than consumer SSDs, so growing AI server investment becomes a major driver of earnings improvement for NAND makers.
A thin, round silicon disc on which semiconductor chips are made. Hundreds to thousands of chips are patterned on a single wafer and then cut apart. Output is often expressed as wafer starts per month.
e.g. 300mm (12-inch) wafers are mainly used.
The front-end is the stage that etches circuits onto the wafer; the back-end is the stage that cuts, packages and tests the finished chips. Which process a piece of equipment or material serves affects when related companies benefit and how competition plays out.
A company that handles everything from chip design to manufacturing and sales on its own. Owning fabs means heavy investment and high fixed costs, but profits can rise sharply when the industry is strong.
e.g. Samsung Electronics and Intel are typical IDMs.
A company that only designs chips and outsources manufacturing to foundries, without owning fabs. Capital spending is light, so margins tend to be high, but dependence on foundry capacity is a risk.
e.g. NVIDIA and Qualcomm are fabless companies.
A contract manufacturing business that produces chips designed by other companies. Advanced process technology and yield determine which customers a foundry wins, and orders from large customers greatly affect its earnings outlook.
e.g. TSMC is the leading foundry.
A company that specializes in packaging and testing chips on behalf of others. It grows along with demand for advanced packaging, but its earnings move with its customers' production volumes.
The technology race to make circuits finer so more transistors fit in the same area. The number in a process name (for example, 3nm) no longer matches the actual line width, but a smaller number is seen as more advanced, offering better performance and power efficiency that helps attract customers.
A lithography technology that draws fine circuits onto wafers using light of a very short wavelength. It is essential for leading-edge processes but the machines are extremely expensive, so the scale of EUV tool purchases indicates how heavily a chipmaker is investing.
The share of chips from a wafer that work properly. Higher yield means more chips to sell at the same cost, lowering unit costs, so news on yields for new processes and products moves stock prices right away.
e.g. If 90 of 100 chips work, the yield is 90%.
The industry supplying machines used in chipmaking (lithography, etching and deposition tools) and materials (wafers, gases, chemicals). Equipment makers' earnings tend to track chipmakers' capital spending, while materials makers' earnings track actual production volumes.
Deposition coats the wafer with thin films, etching removes unwanted parts to form circuits, and cleaning washes away impurities. As layer counts rise and circuits grow more complex, these steps are repeated more often, increasing demand for the related equipment.
A process that planarizes the wafer surface using chemicals and a polishing pad. The more layers are stacked, the more often it is needed, linking demand to polishing equipment and consumable materials such as slurry (polishing fluid).
Technology that connects multiple chips as one, either side by side on a substrate (2.5D) or stacked vertically (3D). CoWoS is a leading 2.5D approach that bundles a GPU with HBM, and it is often cited as the bottleneck that sets AI chip supply.
Technology that drills tiny holes through a chip to electrically connect the chips above and below. It is key to stacking chips vertically, as in HBM, so related equipment and process capability tie into HBM competitiveness.
A high-end substrate that connects a high-performance chip (CPU, GPU, AI chip) to the mainboard. As chips grow larger and more complex, substrates get bigger with more layers and higher unit prices, affecting substrate makers' profitability.
GPUs excel at massively parallel computing and are widely used for AI training, NPUs are chips dedicated to AI computation, and ASICs are custom chips designed for a specific customer or purpose. As Big Tech companies develop more of their own chips (ASICs), new demand arises for design partners and foundries.
An approach that splits one large chip into several smaller function-specific chips and links them through packaging. It is spreading because it helps yield and cost, and it increases demand for advanced packaging and substrates.
A connection standard that links CPUs, GPUs and memory at high speed so memory can be expanded or shared. It is drawing attention as a way past servers' memory capacity limits and is cited as a next growth driver for memory makers.
The average unit price of products sold over a period. Memory ASPs swing widely with supply and demand, and even a small rise can boost profits sharply, making it one of the most watched numbers at earnings time.
e.g. If shipments stay the same and DRAM ASP rises 10%, revenue rises 10%.
The growth rate of memory shipments measured by storage capacity (bits) rather than the number of chips. Memory revenue is roughly explained by bit growth multiplied by the change in ASP, so a company's bit growth outlook is the basis for earnings forecasts.
The number of days it would take to sell off all inventory on hand. Longer inventory days at memory makers or their customers are often read as a sign of falling prices, and shorter days as a sign of a price rebound.
The recurring pattern in which memory prices rise (upcycle) and fall (downcycle) with changes in supply and demand. Stock prices tend to move ahead of earnings, so judging the bottom and peak of the cycle is central to memory investing.
The share of a fab's maximum production capacity that is actually being used. Chipmaking has large fixed equipment costs, so costs jump when utilization falls, and it is used as a leading indicator, especially for foundry earnings.
Deliberately reducing output when oversupply pushes prices down. Shipments fall in the short run, but inventory clears and prices can rebound, so production cut announcements by major memory makers are sometimes read as a sign the industry has hit bottom.
Policies, mainly from the US, that restrict exports of advanced chips and equipment to China. Each change in the scope of controls shakes earnings outlooks for equipment and chip companies with large China sales, driving stock price moves.